Semiconductor transistors, in particular field-effect controlled switching devices such as Metal Oxide Semiconductor Field Effect Transistors (MOSFET) and Insulated Gate Bipolar Transistors (IGBT) have been used in a wide variety of applications such as power supplies, power converters, electric cars and air-conditioners. Many of these applications are high power applications, which require the transistors to be able to accommodate substantial current and/or voltage.
Power transistors, which may have voltage blocking capabilities of up to several hundred volts and a current rating of higher than one ampere, can be implemented as vertical MOS trench transistors. In a vertical transistor, a gate electrode can be arranged in a trench that extends in a vertical direction of the semiconductor body. The gate electrode is dielectrically insulated from source, body and drift regions of the transistor and is adjacent to the body region in a lateral direction of the semiconductor body. A drain region may adjoin the drift region, and a source electrode may be connected to the source region.
Silicon-carbide (SiC) offers certain favorable properties as a substrate material for power transistors. The specific properties of SiC can be utilized to implement power transistors with a higher voltage blocking capability at a given on-resistance in comparison to semiconductor devices using other substrate materials, such as silicon. For example, SiC offers a critical electric field (i.e., the electric field at which avalanche breakdown occurs) of 2×106 Volts/Centimeter (V/cm), which is higher than that of conventional silicon. Thus, a comparably configured SiC based transistor has a higher threshold for avalanche breakdown than a conventional silicon based transistor.
Although SiC offers favorable properties with respect to breakdown voltage, it also presents several design challenges. For example, in an SiC based device, the interface between the SiC and the gate dielectric (e.g., SiO2) is prone to thermal oxidation, which leads to defects in the SiC. One consequence of these defects is lower electron mobility and increased on-resistance. Furthermore, due to difficulties in trench etching techniques, the corners of the gate trench in an SiC based device are uneven. Consequently, it is difficult to provide a gate dielectric of uniform thickness in the corners of the gate trench. This in turn leads to increased electric fields in the corners of the gate trench, which make the device more susceptible to failure. The electric field in the gate dielectric may increase by a factor 2.5 if the electric field in the SiC approaches the critical electric field. Thus, to fully take advantage of the beneficial avalanche breakdown properties of SiC, proper measures must be taken to shield the gate dielectric from the large voltages that are tolerated by the SiC material.
There is a need to provide a power transistor in SiC technology with minimal defects in the channel region and a shielded gate structure at minimal expense.